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MAX5986AMAX5986C/MAX5987A
IEEE 802.3af-Compliant, High-Efficiency, Class 1/
Class 2, PDs with Integrated DC-DC Converter
  12
Maxim Integrated
Pin Description (continued)
PIN
NAME
FUNCTION
MAX5986A
MAX5986B/
MAX5986C
MAX5987A
6, 10, 11
6
6
GND
Ground. Reference rail for the device. It is also the quiet ground for all
voltage reference (e.g., FB is referenced to this GND).
7
7
7
VDRV
Internal 5V Regulator Voltage Output. The internal voltage regulator provides
5V to the MOSFET driver and other internal circuits. VDRV is referenced to
GND. Do not use VDRV to drive external circuits. Connect a 1FF bypass
capacitor between VDRV and GND.
8
8

SL
Sleep Mode Enable Input. A falling edge on SL brings the device into Sleep
mode. An external resistor (R
SL
) connected between SL and GND sets the
LED current (I
LED
).


8
LDO_
FB
LDO Regulator Feedback Input. Connect to VDRV to get the preset LDO
output voltage of 3.3V, or connect to a resistive divider from the LDO_OUT to
GND for an adjustable LDO output voltage.
9
9

ULP
Ultra-Low Power-Mode Enable Input. ULP has an internal 50kI pullup resistor to
the internal 5V bias rail. A falling edge on SL while ULP is asserted low enables
ultra-low power mode. When ultra-low power mode is enabled, the power
consumption of the device is reduced even lower than sleep mode to comply
with ultra-low power sleep power requirements while still supporting MPS.

10
9
CLASS2
Class 2 Selection Input. Connect to VDRV for Class 2 operation. Connect to
GND for Class 1 operation.

11
10
MPS
MPS Enable Input. Connect to VDRV to turn the MPS function on. Connect to
GND to turn MPS off.


11
RESET
Open-Drain RESET Output. The RESET output is driven low if either LDO_OUT
or FB drops below 90% of its set value. RESET goes high 100Fs after both
LDO_OUT and FB rise above 95% of their set values. Leave unconnected
when not used.
12
12
12
WAD
Wall Power Adapter Detector Input. Wall adapter detection is enabled when
the voltage from WAD to GND is greater than 8.8V. When a wall power
adapter is present, the isolation p-channel power MOSFET turns off. Connect
WAD directly to GND when the wall power adapter or other auxiliary power
source is not used.
13
13
13
V
DD
Positive Supply Input. Connect a 68nF (min) bypass capacitor between V
DD
 
and PGND.
14
14
14
V
CC
DC-DC Converter Power Input. V
DD
 is connected to V
CC
 by an isolation
p-channel MOSFET. Connect a 10FF capacitor in parallel with a 1FF ceramic
capacitor between V
CC
 and PGND.
15
15
15
PGND
Power Ground. Power ground of the DC-DC converter power stage. Connect
PGND to GND with a star connection. Do not use PGND as reference for
sensitive feedback circuit.
16
16
16
RREF    Signature Resistor Connection. Connect a 24.9kI resistor (R
SIG
) to GND.



EP
Exposed Pad. Connect the exposed pad to ground.
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